1. Field of the Invention
This invention relates to data communications, and more particularly to a system and method for initiating source-synchronous or clock-forwarded transfers, using a ratio bit such as may be transferred in a serial data stream.
2. Description of the Related Art
In computer systems, especially computer systems including devices that may operate according to differing internal clocks with different clock rates, some mechanism is needed to assure that devices are initialized to their proper clock rate. For example, a processor in a computer system must be initialized to its operating frequency clock rate. Typically, a system clock that operates at a relatively slow clock frequency is used as a timing reference for the computer system.
One solution to initializing devices in computer systems is either to operate at the system clock rate or to operate at a predetermined multiple of the system clock rate. The computer system may be designed so that each device in the computer system operates at a fixed multiple of the system clock rate. One problem that arises is that certain devices in the computer system, such as processors, may operate at one or more different clock rates based on which processor is included in the computer system. It may also be desirable to allow for upgrading the processor or other device to one that operates according to a faster clock rate than originally designed.
Another solution is to have each device, or subset of devices, operate at a local clock rate that is a different multiple of the system clock rate. This technique may allow for different devices, such as processors, memory, input/output buses, etc., to operate at an optimal local clock rate. One problem that arises is that data transfers between devices that operate according to different clock rates are between clock domains. Data transfers between clock domains require that either a clock signal is shared by both the sending and the receiving devices, e.g. a synchronous transfer, or a clock signal is forwarded with the data, e.g. a source-synchronous or clock-forwarded transfer. One problem with synchronous transfers is that clock skew may become unmanageable as the clock frequency increases.
What is needed is a system and method for initializing source-synchronous transfers in a computer system. It would be desirable for the system and method to use a minimum amount of resources of the computer system.
The problems outlined above may be in large part solved by a system and method for initializing deterministic source-synchronous transfers between devices in a computer system using one or more ratio bits to indicate a ratio between clocks. In an exemplary computer system, one or more processors are each coupled to a bridge. The one or more ratio bits are used to indicate a ratio between the system clock of a first device, such as a processor, and the system clock of a second device, such as the bridge. Each device may also operate at a multiple of its system clock. Once the one or more ratio bits have been stored, the first device can determine when edges of its operating clock correspond to edges of the operating clock of the second device. The use of the one or more ratio bits may advantageously allow devices in the computer system to operate on different system clocks without dedicated signal lines or pins to indicate the frequencies of those different system clocks.
Broadly speaking, a method is contemplated, for initializing deterministic data transfers between a first device and a second device. The first device operates according to at least a first clock having a first clock rate. The second device operates according to at least a second clock having a second clock rate. The ratio between the second clock rate and the first clock rate is an integer number greater than or equal to one. The method comprises the first device receiving a serial data stream that includes at least one ratio bit, wherein the ratio bit is encoded with the ratio between the second clock rate and the first clock rate. The first device uses the ratio bit to determine an edge of the second clock. The first device transmits a first source-synchronous clock to the second device on the edge of the second clock. The method may advantageously allow for the source-synchronous clocking to be initialized without a negotiation protocol between the first device and the second device. In one embodiment, the second device transmits a second source-synchronous clock to the first device on the edge of the second clock. In another embodiment, the method may further include the second device signaling the first device. The signaling may indicate that the second device is ready to receive source-synchronous transfers.
A computer system is also contemplated. The computer system comprises a memory configured to store initialization information for the computer system, logic coupled to the memory for transmitting the initialization information, at least one processor coupled via a serial line to the logic, and a device coupled to the processor. The initialization information includes at least one ratio bit, where the ratio bit is encoded with the ratio between a first clock having a first clock rate and a second clock having a second clock rate. The processor is coupled to receive the first clock and the second clock and to operate according to the second clock. The ratio between the second clock rate and the first clock rate is an integer greater than or equal to one. The device is configured to operate according to the first clock rate. The logic is configured to transmit the initialization information over the serial line to the processor, and the processor is configured to decode the ratio bit to determine the first clock rate. The processor and the device are configured to exchange data using source-synchronous clocks that are initialized using the ratio bit to determine a common clock edge.